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 2N6071A/B Series
Preferred Device
Sensitive Gate Triacs
Silicon Bidirectional Thyristors
Designed primarily for full-wave AC control applications, such as light dimmers, motor controls, heating controls and power supplies; or wherever full-wave silicon gate controlled solid-state devices are needed. Triac type thyristors switch from a blocking to a conducting state for either polarity of applied anode voltage with positive or negative gate triggering.
Features
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TRIACS 4.0 A RMS, 200 - 600 V
* Sensitive Gate Triggering Uniquely Compatible for Direct Coupling * * * * *
to TTL, HTL, CMOS and Operational Amplifier Integrated Circuit Logic Functions Gate Triggering: 4 Mode - 2N6071A, B; 2N6073A, B; 2N6075A, B Blocking Voltages to 600 V All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity and Stability Small, Rugged, Thermopad Construction for Low Thermal Resistance, High Heat Dissipation and Durability Device Marking: Device Type, e.g., 2N6071A, Date Code
MT2 G MT1
REAR VIEW SHOW TAB
3
TO-225 CASE 077 STYLE 5 21
MARKING DIAGRAM
YWW 2N 607xyG = 1, 3, 5 = A, B = Year = Work Week = Pb-Free Package
1. Cathode 2. Anode 3. Gate x y Y WW G
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
Preferred devices are recommended choices for future use and best overall value.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
1
April, 2006 - Rev. 7
Publication Order Number: 2N6071/D
2N6071A/B Series
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating *Peak Repetitive Off-State Voltage (Note 1) (TJ = *40 to 110C, Sine Wave, 50 to 60 Hz, Gate Open) 2N6071A,B 2N6073A,B 2N6075A,B *On-State RMS Current (TC = 85C) Full Cycle Sine Wave 50 to 60 Hz *Peak Non-repetitive Surge Current (One Full cycle, 60 Hz, TJ = +110C) Circuit Fusing Considerations (t = 8.3 ms) *Peak Gate Power (Pulse Width 1.0 ms, TC = 85C) *Average Gate Power (t = 8.3 ms, TC = 85C) *Peak Gate Voltage (Pulse Width 1.0 ms, TC = 85C) *Operating Junction Temperature Range *Storage Temperature Range Mounting Torque (6-32 Screw) (Note 2) Symbol VDRM, VRRM 200 400 600 IT(RMS) ITSM I2t PGM PG(AV) VGM TJ Tstg - 4.0 30 3.7 10 0.5 5.0 -40 to +110 -40 to +150 8.0 A A A2s W W V C C in. lb. Value Unit V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 2. Torque rating applies with use of a compression washer. Mounting torque in excess of 6 in. lb. does not appreciably lower case-to-sink thermal resistance. Main terminal 2 and heatsink contact pad are common.
THERMAL CHARACTERISTICS
Characteristic *Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds *Indicates JEDEC Registered Data. Symbol RqJC RqJA TL Max 3.5 75 260 Unit C/W C/W C
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2
2N6071A/B Series
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted; Electricals apply in both directions)
Characteristic OFF CHARACTERISTICS *Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) ON CHARACTERISTICS *Peak On-State Voltage (Note 3) (ITM = "6.0 A Peak) *Gate Trigger Voltage (Continuous DC), All Quadrants (Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = -40C) Gate Non-Trigger Voltage, All Quadrants (Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = 110C) *Holding Current (Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = "1 Adc) TJ = -40C TJ = 25C Turn-On Time (ITM = 14 Adc, IGT = 100 mAdc) VTM VGT - VGD 0.2 IH - - tgt - - - 1.5 30 15 - ms - - mA 1.4 2.5 V - - 2 V V TJ = 25C TJ = 110C IDRM, IRRM - - - - 10 2 mA mA Symbol Min Typ Max Unit
QUADRANT (Maximum Value) Type Gate Trigger Current (Continuous DC) (Main Terminal Voltage = 12 Vdc, RL = 100 W) 2N6071A 2N6073A 2N6075A 2N6071B 2N6073B 2N6075B DYNAMIC CHARACTERISTICS Critical Rate of Rise of Commutation Voltage @ VDRM, TJ = 85C, Gate Open, ITM = 5.7 A, Exponential Waveform, Commutating di/dt = 2.0 A/ms 3. Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%. *Indicates JEDEC Registered Data. dv/dt(c) - 5 - V/ms IGT @ TJ +25C -40C +25C -40C I mA 5 20 3 15 II mA 5 20 3 15 III mA 5 20 3 15 IV mA 10 30 5 20
SAMPLE APPLICATION: TTL-SENSITIVE GATE 4 AMPERE TRIAC TRIGGERS IN MODES II AND III
14 MC7400 4 7 VEE = 5.0 V + 510 W 2N6071A LOAD 115 VAC 60 Hz
0V
-VEE
Trigger devices are recommended for gating on Triacs. They provide: 1. Consistent predictable turn-on points. 2. Simplified circuitry. 3. Fast turn-on time for cooler, more efficient and reliable operation.
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3
2N6071A/B Series
Voltage Current Characteristic of Triacs (Bidirectional Device)
+ Current Quadrant 1 MainTerminal 2 +
Symbol
VDRM IDRM VRRM IRRM VTM IH
Parameter
Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current Maximum On State Voltage Holding Current Quadrant 3 MainTerminal 2 - IH VTM IRRM at VRRM on state IH
VTM
off state
+ Voltage IDRM at VDRM
Quadrant Definitions for a Triac
MT2 POSITIVE (Positive Half Cycle) +
(+) MT2
(+) MT2
Quadrant II
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant I
IGT - (-) MT2 (-) MT2
+ IGT
Quadrant III
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant IV
- MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in-phase signals (using standard AC lines) quadrants I and III are used. SENSITIVE GATE LOGIC REFERENCE
IC Logic Functions
TTL HTL CMOS (NAND) CMOS (Buffer) Operational Amplifier Zero Voltage Switch 2N6071A Series 2N6071A Series 2N6071A Series 2N6071B Series 2N6071B Series 2N6071B Series 2N6071A Series
Firing Quadrant I II
2N6071A Series 2N6071A Series
III
2N6071A Series 2N6071A Series
IV
2N6071B Series
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4
2N6071A/B Series
110 TC , CASE TEMPERATURE ( C) TC , CASE TEMPERATURE ( C) 110 = 30 60 100 = 30 60 90 90 120 180 90 100
90
120 180
dc
80
a = CONDUCTION ANGLE 0 1.0 2.0 3.0 IT(AV), AVERAGE ON-STATE CURRENT (AMP) 4.0
80 a 70
a
dc
70
= CONDUCTION ANGLE 0 1.0 2.0 3.0 IT(RMS), RMS ON-STATE CURRENT (AMP) 4.0
Figure 1. Average Current Derating
8.0 a P(AV) , AVERAGE POWER (WATTS) 6.0 a = CONDUCTION ANGLE 60 4.0 = 30 90 180 120 dc P(AV) , AVERAGE POWER (WATTS) 6.0 a 8.0
Figure 2. RMS Current Derating
a = 180 120 4.0
dc
= CONDUCTION ANGLE
2.0
2.0 90 0
60
30
0 0 3.0 1.0 2.0 IT(AV), AVERAGE ON-STATE CURRENT (AMP) 4.0
0
1.0 2.0 3.0 IT(RMS), RMS ON-STATE CURRENT (AMP)
4.0
Figure 3. Power Dissipation
V GT , GATE TRIGGER VOLTAGE (NORMALIZED) 3.0 2.0 OFF-STATE VOLTAGE = 12 Vdc ALL MODES I GT , GATE TRIGGER CURRENT (NORMALIZED) 3.0 2.0
Figure 4. Power Dissipation
OFF-STATE VOLTAGE = 12 Vdc ALL MODES
1.0 0.7 0.5
1.0 0.7 0.5
0.3 -60
-40
-20
0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (C)
120
140
0.3 -60
-40
-20
0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (C)
120
140
Figure 5. Typical Gate-Trigger Voltage
Figure 6. Typical Gate-Trigger Current
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5
2N6071A/B Series
40 30 20 IH, HOLDING CURRENT (NORMALIZED) 3.0 2.0 GATE OPEN APPLIES TO EITHER DIRECTION
1.0 0.7 0.5
10 7.0 ITM , ON-STATE CURRENT (AMP) 5.0 TJ = 110C
0.3 -60
-40
-20
0
20
40
60
80
100
120
140
3.0 2.0
TJ, JUNCTION TEMPERATURE (C)
Figure 8. Typical Holding Current
TJ = 25C 34 PEAK SINE WAVE CURRENT (AMP) 32 30 28 26 24 22 20 18 16 14 1.0 2.0 3.0 4.0 5.0 7.0 10 TJ = -40 to +110C f = 60 Hz
1.0 0.7 0.5
0.3 0.2
0.1 0 1.0 2.0 3.0 4.0 5.0 VTM, ON-STATE VOLTAGE (VOLTS)
NUMBER OF FULL CYCLES
Figure 7. Maximum On-State Characteristics
Z JC(t), TRANSIENT THERMAL IMPEDANCE C/W) ( 10 5.0 3.0 2.0
Figure 9. Maximum Allowable Surge Current
MAXIMUM
TYPICAL 1.0 0.5 0.3 0.2 0.1 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 t, TIME (ms) 100 200 500 1.0 k 2.0 k 5.0 k 10 k
Figure 10. Thermal Response
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6
2N6071A/B Series
ORDERING INFORMATION
Device 2N6071A 2N6071AG 2N6071B 2N6071BG 2N6071BT 2N6071BTG 2N6073A 2N6073AG 2N6073B 2N6073BG 2N6075A 2N6075AG 2N6075B 2N6075BG Package TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) TO-225 TO-225 (Pb-Free) 500 Units / Box Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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7
2N6071A/B Series
PACKAGE DIMENSIONS
TO-225 CASE 77-09 ISSUE Z
-B- U Q -A-
123 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 077-01 THRU -08 OBSOLETE, NEW STANDARD 077-09. INCHES MIN MAX 0.425 0.435 0.295 0.305 0.095 0.105 0.020 0.026 0.115 0.130 0.094 BSC 0.050 0.095 0.015 0.025 0.575 0.655 5_ TYP 0.148 0.158 0.045 0.065 0.025 0.035 0.145 0.155 0.040 --- MILLIMETERS MIN MAX 10.80 11.04 7.50 7.74 2.42 2.66 0.51 0.66 2.93 3.30 2.39 BSC 1.27 2.41 0.39 0.63 14.61 16.63 5 _ TYP 3.76 4.01 1.15 1.65 0.64 0.88 3.69 3.93 1.02 ---
F M
C
H
K
V G S D 2 PL 0.25 (0.010)
M
J R 0.25 (0.010) A
M
A
M
M
B
M
B
M
DIM A B C D F G H J K M Q R S U V
STYLE 5: PIN 1. MT 1 2. MT 2 3. GATE
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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8
2N6071/D


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